| PCI Express and PCI: | - Supports 1-lane 2.5 Gb/s PCI Express.
- Utilizes 100-MHz Differential PCI Express Common Reference Clock
- Fully Compliant with PCI Express Base Specification, Revision 1.0a
- Packetized serial traffic with PCI Express split completion protocol
- Automatic retry of bad packets
- 8b/10b signal encoding
- In-band interrupts and messages
- Support of message signaled interrupts
- Fully Compliant with PCI Local Bus Specification, Revision 3.0
- PCI Bus Power Management Interface r1.1 Compliant
| | IEEE 1394 Std Support: | - Fully Supports Provisions of IEEE P1394b Revision 1.33+ at 1-Gigabit Signaling Rates
- Fully Supports Provisions of IEEE 1394a.2000 and 1394.1995 Standard for High Performance Serial Bus
- Fully Interoperable With Firewire., i.LINK., and SB1394., Implementation of IEEE Std 1394
| | 1394 Bus Transfer Rate: | - Provides two IEEE Std 1394b-2002 fully compliant cable ports at 100/200/400/800 megabits per second (Mbits/s).
| | Number of Ports: | - Two Bilingual P1394b Cable Ports
- Bilingual 9pin Connector with Screw Holes for Jackscrew Type Plug Cable
| | Power Management: | D0, D1, D2, and D3 power states and PME events per the PCI Bus Power Management Interface Specification
| | Bus Power Connector: | Big IDE 4-pin DC Power Connector
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